1. Field
Exemplary embodiments of the present invention relate to a signal sampling circuit and an image sensor having the same.
2. Description of the Related Art
Recently, the demand for digital cameras has explosively increased with the development of visual communication using the Internet. Furthermore, with the increase in spread of mobile communication terminals with a camera, such as a PDA (Personal Digital Assistant), an IMT-2000 (International Mobile Telecommunications-2000) terminal, and a CDMA (Code Division Multiple Access) terminal, the demand for small-sized camera modules has increased.
A camera module basically includes an image sensor. In general, an image sensor refers to a device which converts an optical image into an electrical signal. As such an image sensor, a charge coupled device (CCD) and a complementary metal-oxide-semiconductor (CMOS) image sensor have been widely used.
The CCD has a complicated driving method and high power consumption. Furthermore, since the number of mask processes is relatively large during a fabrication process thereof, the fabrication process is complex. In addition, since a signal processing circuit cannot be implemented in a chip, it is difficult to implement the CCD in one chip. The CMOS image sensor may be formed in a monolithic integrated circuit including control, driving, and signal processing units. Accordingly, the CMOS image sensor has come into the spotlight. Furthermore, the CMOS image sensor may operate at a low voltage, have low power consumption, feature compatibility with peripheral devices, and exhibit usefulness in a standard CMOS fabrication process. The CMOS image sensor may be fabricated at a low cost.
A unit pixel of the CMOS sensor includes a photo-diode, a transmission transistor, a reset transistor, a driving transistor, and a selection transistor. The respective transistors operate to sample a video signal based on a reset voltage and photo-charges received in the photo-diode. The sampled signal is converted into pixel data.
FIG. 1 is a circuit diagram schematically illustrating a switch SW, serving as a reset or transmission transistor, and a floating capacitor CS of a floating diffusion node FD. FIG. 1 illustrates a switch SW, which is configured to output an input signal VIN to the floating diffusion node FD through a switching operation responding to a control signal CON, and a sampling capacitor CS which is configured to sample the signal outputted from the switch SW. Since such a circuit uses a metal oxide semiconductor (MOS) transistor as the switch, clock feedthrough or a charge injection error may occur.
The clock feedthrough or charge injection error refers to noise which occurs due to a parasitic capacitor CP existing between a gate and a drain of the MOS transistor or between the gate and a source of the MOS transistor, when the MOS transistor is switched from on to off, in case where the MOS transistor is used as the switch SW. Such noise may degrade the quality of an image generated through the image sensor.